For minimizing the wiring complexities, for example in vehicles, it is common practice to transmit control signals for driving actuator devices via a bus to which, besides a control unit, the drive units for the actuator devices of the individual participants are connected. Combined to form a bus system are, for example, the actuator devices of a vehicle air conditioner, the window lift or the front seats of a vehicle. To enable the control unit to selectively drive one or a plurality of actuators, addresses are assigned to said actuators.
In older systems the addresses have been assigned to the participants in that they have been stored by programming, assigned via daisy chain, plug or PIN coding, or by sequential connection of the participant and allocation of the addresses after connection of a participant.
While programming is relatively easy during the manufacture of a vehicle, this is more complicated when the overall participant, i.e. the combination of the actuator device plus the drive unit, is, for example, replaced in a repair shop. Further, with regard to the logistics it is necessary that defined placement sequences are adhered to, which involves service inconvenience and the supply of pre-programmed (pre-addressed) components, which runs counter to the “identical-part principle” used in the automotive industry. The plug coding involves high costs due to the mechanical expenditure, and with regard to the stored address or the pin coding the logistics is complex since in this case no longer identical parts are involved such that these parts are no longer easily interchangeable. In the case of a daisy chain it is possible to realize the self-addressing of the participants of a bus system via switches for serially separating the bus connections between the participants. The drawbacks encountered in this regard are in particular the electrical disconnection of the bus line via active components and the large space requirement for bus systems which comprise a lot of participants.
Automated address allocation methods for bus systems are known in the art. A first group of bus systems, as e.g. described in U.S. Pat. No. 6,397,280B1, uses a circuit breaker (switch) for decoupling part of the chain from the master (also called “control unit”). So, at start-up, the master only “sees” the first slave (also called “participant”), and assigns a first address. Then the first slave closes its switch, and the master “sees” the second slave, etc. In this way each slave on the bus can be allocated a unique address, starting from the slave closest to the master.
A second group of bus systems uses the principle of sensing currents. In such a bus system, addresses are sequentially assigned to each slave, starting from the slave most distant from the master.
U.S. Pat. No. 7,091,876B2 describes such a bus system, (see also FIG. 1 of the present invention, which is a replica of FIG. 1 and FIG. 7 of U.S. Pat. No. 7,091,876B2). The functioning of this bus system will be described in detail here, in order to allow a good understanding of the present invention. FIG. 1 shows the setup of a serial bus system 10 (e.g. LIN-bus). The bus system 10 comprises a control unit 12 (master) to which a bus 14 is connected. Along the bus 14 a plurality of addressable participants (slaves) 16.1, 16.2, . . . , 16.n−1, 16.n (in general denoted 16.i below) are connected to said bus 14. All participants 16.i and the control unit 12 are connected to a supply voltage VDD and a ground voltage GND and can, at option, apply said potentials to the bus 14. The control unit 12 comprises a control circuit shown at 18 which applies control and addressing signals to the bus 14 and/or receives signals from the participants 16.i via the bus 14. The control circuit 18 drives a switch 22 with the aid of which the bus 14 is connectable via the control unit 12 with GND. Between VDD and the bus 14 a pull-up resistor 24 is located. All participants 16.i of the bus system 10 shown in FIG. 1 are equipped with an addressing logic 26 which is connected with a detector 28 and a control circuit 30. The control circuit 30 is connected with the bus 14, and the detector 28 measures, via a shunt resistor 32 located in the bus 14, the current flowing through the bus 14, in the area of the participant concerned, as a voltage drop which is amplified via an amplifier 34. Other variants of the detector 28 are also possible, provided that the detector 28 is in a position to measure the current flowing through the bus 14 in the area of the connecting node 36 of a participant 16.i. The control circuit 30 further controls a switch 38 in each participant 16.i, while the switches 40, 42 of each participant 16.i are controlled by the participant's addressing logic 26. The switch 38 connects, at option, the bus 14 with GND, while the switch 40 places the bus 14 via a pull-up resistor 44 to VDD, and the switch 42 connects the bus 14 with a current source 46 which feeds into the bus 14 an identifying current required for identifying a participant 16.i. Instead of a current source 46 a second pull-up resistor (not shown) may be arranged, provided that the VDD-potential is stable. In this embodiment the participants 16.i drive respective actuating members 48 assigned to the participants 16.i, said actuating members 48 being connected via an interface 50 with the control circuit 30 of the participant 16.i concerned. With the aid of the pull-up resistors and the switch 40 (in the closed state) the bus 14 is placed to VDD-potential in the area of each participant 16. When the switch 40 is closed, a quiescent current IR, is fed into the bus 14. The connection of the bus 14 with VDD via the pull-up resistors 44 results, inter alia, in an interference-immunity of the bus 14, which is known for bus applications of the kind discussed here. For the sake of completeness it should be said that in all connecting lines of the control unit 12 and the participants 16.i comprising the aforementioned switches inverse-polarity protection diodes are provided which, however, like the switches 38 of the participants 16.i, are of no importance for the automatic addressing process described below. The initial situation for addressing the participants 16.i is shown in FIG. 1. The switch 22 of the control unit 12 and the switches 40 of the participants 16.i are closed, while the switches 38 of the participants 16.i remain open all the time. In this situation, the participants 16.i, which are designated in the drawing 16.1, 16.2, 16.n−1 and 16.n to allow better distinction between the participants (wherein n is the total of all participants), feed quiescent currents IR1, . . . , IRn. It should be noted here that feeding of quiescent current during the addressing process is not absolutely necessary. If no quiescent current is fed, merely the switch 22 of the control unit 12 is closed at the beginning of the addressing process, while all other switches of the control unit 12 and the participants 16.i are open. When quiescent current is fed, currents of different magnitudes flow at the level of the different participants 16.i through the bus 14, said currents being detected with the aid of the detectors 28. The quiescent currents flow from the connecting nodes 36 of the participants 16.i to the control unit 12 where the quiescent currents flow off to GND. Due to arrangement of the detectors 28 behind the connecting nodes 36 (when looking at the bus 14 from the control unit 12), the detector 28 of the participant 16.n connected to the bus 14 at a location farthest away, as seen from the control unit 12, does not detect any quiescent current, the detector 28 of the participant 16.n−1 detects the quiescent current IRn, the detector 28 of the participant 16.2 detects a quiescent current which is equal to the sum of the quiescent currents IR3 to IRn of the participants 16.3 (not shown) to 16.n, and finally the detector 28 of the participant 16.1 detects a quiescent current which is equal to the sum of the quiescent currents IR2 to IRn. The respective currents detected by the participants 16.1 to 16.n during this phase are stored in the addressing logic 26. After a defined period of time the participants 16 not addressed so far close their switches 42. As described above in conjunction with feeding of the quiescent currents, currents with different magnitudes occur after feeding of the addressing currents IA1 to IAn in the individual sections of the bus 14, which currents are detected by the detectors 28. Apart from the detector 28 of the last participant 16.n, all other participants 16.1 to 16.n−1 now detect a current on the bus 14, said current exceeding the value previously measured and stored in the addressing logic 26 by the magnitude of an identifying current (the identifying currents of all participants have the same magnitude). In other words: the participant 16.n is identifiable. If in the next step the control unit 12 applies an addressing signal to the bus 14, this signal is accepted only by the participant 16.n and placed into the addressing logic 26 of this participant. The participant 16.n addressed in this manner does not take part in the further addressing process. As already explained above, the addressing process does not require measurement of the quiescent current. Thus in the addressing logic 26 of the participants 16 no current values are stored when feeding of the identifying current begins. The participant to be addressed during the first addressing cycle can then be identified by its detector 28 not detecting any current flow despite the fact that an identifying current is being fed. When the current detection in each participant 16 is carried out before its connecting node 36 (when looking at the bus 14 from the control unit 12), identification of a participant to be identified in an addressing cycle is effected by the detector 28 of this participant detecting a current equal to the identifying current, while the other participants detect a current which is at least twice as large as the identifying current. In this manner, a participant can be identified. Above, the first addressing cycle of the automatic addressing process has been described for a case in which the control unit 12 applies, after identification of a participant, an addressing signal to the bus 14. Alternatively, it is also possible to apply the addressing signal to the bus prior to the identification, and to store said signal in the addressing logic 26 of all participants 16.i. In this case, only the identified participant accepts the previously received addressing signal as its own address, while this addressing signal is deleted in the addressing logics 26 of the other participants. After termination of the first addressing cycle the addressed participant 16.n does no longer take part in the further process, i.e. the switch 42 of the participant 16.n remains open. In the manner described above, the participant 16.n−1 can be identified and thus addressed. The process described above is continued until all participants are identified, one by one.
U.S. Pat. No. 7,091,876B2 also describes a second embodiment of a bus-system, identical with the setup of the bus system 10 shown in FIG. 1, whereby the addressing process takes into account that the current flowing on the bus 14 does not exceed a predetermined maximum value. This boundary condition exists, for example, in LIN-bus applications. The initial situation for addressing according to this alternative process is shown again in FIG. 1. All participants 16.i feed their quiescent currents. In a first phase, each participant 16.i detects the respective current flowing through the bus 14. If this current detected by at least one participant exceeds a predetermined threshold value, this fact is interpreted to the effect that participants not addressed so far are connected behind this participant, when looking at the bus 14 from the control unit 12, such that the said participant and all participants connected to the bus 14 between this participant and the control unit 12 do no longer take part in the further addressing process. It is assumed that, as shown in FIG. 1, the participant 16.2 has detected in the bus 14 a current exceeding a threshold value. Therefore the participants 16.1 and 16.2 do not take part in the subsequent feeding of identifying current, such that identifying currents from the participants 16.3 (not shown) to 16.n are fed. The identification within this group of participants feeding identifying currents is then carried out in the manner described above, wherein in the first addressing cycle the participant 16.n is identified and an address can be assigned to this participant. During the next identifying cycle the switch 42 of the participant 16.n remains open all the time. Again, at the beginning of the next identifying cycle all participants 16.1 to 16.n−1 not addressed so far feed their quiescent currents. It should be assumed that during this addressing phase, too, the participant 16.2 detects a current exceeding a threshold value, such that, as has already been described in conjunction with the first addressing cycle, the participants 16.2 and 16.1 do not take part in the further addressing process in the second addressing cycle. The identification and addressing during this second cycle are then carried out in the manner described above and result in identification and/or addressing of the participant 16.n−1. The process described above is continued until a situation occurs in which the participant 16.2 does no longer detect a current value exceeding the threshold value while quiescent current is being fed. If this situation occurs for the first time during the addressing process, the participant 16.1, instead of the participant 16.2, detects a current still exceeding the threshold value while all participants feed their quiescent current. The participant 16.2 then takes part in the identifying and addressing cycle like the participants connected to the bus 14 behind the participant 16 when looking at the bus 14 from the control unit 12. The participant 16.1, however, does not take part in this process step.
U.S. Pat. No. 7,091,876B2 also describes a third embodiment of a bus-system, similar to the setup of the bus system 10 shown in FIG. 1, but whereby besides addressable participants, also non-addressable participants are connected to the bus. These devices already have a fixed address, and do not take part in the addressing cycle described above. They can, however, feed a quiescent current into the bus, which is measured first.
A disadvantage of the bus systems described in U.S. Pat. No. 7,091,876B2 is that it is difficult, and sometimes even impossible, to find suitable threshold values for guaranteeing that each slave is assigned exactly one address. This is especially true in an automotive environment, where devices from multiple vendors are used, and where the parameters of the devices may vary considerably (e.g. due to process variations and varying supply voltage), and where the number of devices may change even after production (e.g. during after-sales service).